VLSI Designs for Efficient Image Processing in Embedded Systems
PDF

Keywords

VLSI Architecture
Embedded Image Processing
Low-Power Design
Hardware Acceleration

Abstract

Efficient image processing in embedded systems demands low-power, high-speed architectures capable of real-time performance. VLSI (Very Large-Scale Integration) technology provides customized hardware solutions that outperform general-purpose processors in terms of throughput and energy efficiency. This paper explores recent advancements in VLSI designs specifically tailored for image processing tasks within embedded systems. Key areas include parallel processing architectures, low-power design strategies, and optimized hardware accelerators for operations like convolution, edge detection, and transform coding. These designs enable implementation in mobile, automotive, and IoT-based vision applications, balancing performance with stringent power and area constraints.

PDF

All articles published in the American Journal of Embedded Systems and VLSI Design (AJESVD) are licensed under the Creative Commons Attribution 4.0 International License (CC BY 4.0). This license allows:

  • Sharing – copying and redistributing the material in any medium or format

  • Adaptation – remixing, transforming, and building upon the material for any purpose, even commercially

Under the following terms:

  • Attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner but not in any way that suggests the licensor endorses you or your use.

By submitting a manuscript to AJESVD, authors agree to make their work freely available under the terms of the CC BY 4.0 license and affirm that their submission is original and does not infringe on any third-party rights.